High-Speed Serial Interface (HSSI)
Simulation Objectives
PCIE5, SATA, SAS, SFP28, 10GBase-KR, 100GBase-KR, 56G/112G PAM4 and other high-speed serial signals
![16611384834653502](http://en.edadoc.com/upload/images/product/20230317/16790345003871565.jpg)
Simulation Difficulties
Impedance mismatch,excessive loss, serious ISI
Simulation Process
![](http://en.edadoc.com/upload/images/product/20220822/16611385359645089.jpg)
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Cascade Design
Plan the lamination according to the actual situation, comprehensively consider the model, thickness, glue content, glue flow rate, etc. of the semi-cured sheet/core board, and provide reasonable impedance control, wiring layer/power ground plane planning and other suggestions.
![](/static/home/images/jt_down.png)
![swp_img2](http://en.edadoc.com/upload/images/product/20220822/16611385344173507.jpg)
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Plate Selection
According to the system signal type and channel conditions, select the plate reasonably to ensure the signal quality and reduce the production cost.
![](/static/home/images/jt_down.png)
![swp_img3](http://en.edadoc.com/upload/images/product/20220822/16611385341323104.jpg)
![](/static/home/images/jt_down.png)
Passive Channel Evaluation Based on S Parameter
Determine whether the channel conforms to the protocol standard through the S parameter, and analyze the details of the channel to ensure the system performance.
![](/static/home/images/jt_down.png)
![swp_img4](http://en.edadoc.com/upload/images/product/20220822/16611385359583898.jpg)
![](/static/home/images/jt_down.png)
Active Simulation Based on HSPICE/AMI Model
Add a specific rate code type for eye graph simulation
Measured by eye height and eye width
![](/static/home/images/jt_down.png)