Flexible Circuit Component Assembly and a Math Lesson.

Source:Edadoc Time:2016/6/2 0:00:00
The market for rigid PCBs is estimated to be about 10x the market size for flexible printed circuits (FPCs). As a result, the equipment infra-structure is driven primarily by the needs of the rigid board market. This is true of both equip-ment used to fabricate the circuitry (image, etch, copper plate, AOI, etc.) and equipment used for component assembly (wave solder and SMT assembly).

Flexible circuits are often sold in multiple-up panels or arrays to facilitate the assembly of SMT components. Coordination between the desires of the assembly supplier and the fabrica-tor can have a significant effect on costs based on material/panel utilization. Fabrication pan-els are generally larger (12”x24” and 18”x24” are common sizes in the U.S.) than assembly panels. Assembly panel sizes should be efficient subsets of fabrication panel sizes to optimize material utilization. The math for determining parts per panel becomes a bit more complicated since fabrication panels will have a “keep out” border around the perimeter of the panel for tooling holes, fiducials, and test coupons.

In addition to considerations for material utilization based on circuit fabrication panel sizes, the quantity of circuits on a given pan-el size will be a function of several other vari-ables. These variables include: size of the cir-cuit, components to be populated, registration requirements, and assembly equipment capa-bility. Multiple fiducials per panel may slow SMT placement rate, but this tradeoff is often trumped by the yield improvement and/or re-work avoided.

machined glass epoxy carrier that is bonded to the circuitry. This can be the same material as is used to selectively apply discrete component stiffeners, thereby integrating the carrier pan-el and the component stiffeners into a single drilled and routed stiffener. Breakaway features separate the carrier from the circuitry after com-ponent assembly. Both these methods mimic the handling conventions of rigid printed circuits.

Multiple-up panels inevitably result in a dis-cussion about defective parts within the panel matrix. False economy results when the con-tract manufacturer (CM) specifies a “no X-out” requirement. The CM wants to operate their equipment as efficiently as possible, and intu-itively this works best if they never deal with defective parts within the assembly panel. But this will often make the CM non-competitive on their bid to capture the business because of the premium paid for circuits.

The incredible yield impact on the fabrica-tion house is best illustrated with an example. Suppose an assembly panel with eight circuits is required. If any of the circuits within the pan-el are defective, the entire panel is scrap. Even if the fabrication process is running at a 98% yield, the probability of all eight parts being good on a panel tumbles to 85%! As circuit den-sity, tolerances, and layer counts increase, yields of 90–95% are not uncommon. Using the same 8-up panel and a 92% yield, the probability of a defect-free panel is a mere 51%.

These statistical calculations assume defects occur randomly on a panel, which is probably a stretch, but the illustration remains valid. Someone has to pay for all those good parts that are thrown in the trash can. The fabrica-tion house, seeing a ‘no X-out’ requirement, will quote the part assuming a poor yield. The likely consequence is the CM uses an inflated circuit cost in their BOM and doesn’t get the contract, especially if they are competing with assembly houses allowing defects within the panel. Today’s modern SMT equipment has the ability to recognize black marked circuits and will avoid placing components on these indi-vidual circuits. Most CMs recognize this ineffi-ciency is a legitimate cost expectation and are willing to concede some level of defective parts within a panel.

The example with defective parts in a panel is a good illustration of the need for compat-ibility and cooperation among the members in the supply chain. Sub-optimizing at circuit fab may make component assembly much more cost-effective. Or vice versa. Lowest cost is of-ten achieved as a result of compromise. Under-standing the big picture will win the game.

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